In a common application for integrated circuit fabrication, a contact/via opining is etched through an insulating layer to an underlying conductive area to which electrical contact is to be made. A conducting layer material is deposited within the contact/via opening. The damascene and dual damascene processes have become a trend in metallization. Trenches and/or vias are formed in the insulating layers and inlaid with metal, such as copper, to contact with the underlying conductive area. It is desired to use low dielectric constant (low k) materials in order to reduce capacitance of the resulting devices.
It is a challenge to improve the photolithography processing window in damascene process by using ARC, anti-reflection coatings, to reduce reflectivity and improve light absorption, to minimized light scattering back from the underlying substrate. One solution is to use silicon nitride (SiN) or silicon oxynitride (SiON) to be ARC when using low-k materials in the intermetal dielectric layers (IMD). The nitride and oxynitride layers are frequently formed by CVD processes using chemicals such as amine and amide which tend to diffuse into adjacent porous layers of dielectric insulating layers. For example, the increasing use of low-k dielectric materials, typically having a high degree of porosity, facilitates absorption and transport of contaminating chemical species.
Approaches to prevent the diffusion of contaminating nitrogen containing species from overlying etching stop or BARC layers including for example silicon oxynitride, include forming a silicon dioxide layer over the low dielectric constant IMD layer prior to forming the etching stop or BARC layers. A shortcoming of this approach is the added stresses applied to the IMD layer and the added contribution to the overall capacitance of the multi-level semiconductor device.
Another approach has been to use a carbon based BARC's, as the BARC thereby avoiding the presence of nitrogen contaminating species. A shortcoming of this approach is that a carbon based BARC during anisotropic etching contributes to the formation of polymer residues on the sidewalls and bottoms of the etched feature frequently slowing the etching rate within the feature, also referred to as etch stop phenomena.
The related Prior Art will now be described in this section.
U.S. PUB. APP. NO. US20040023497A1 entitled “Method for avoiding carbon and nitrogen contamination of a dielectric insulating layer” published Feb. 5, 2004 to Pan, Shing-Chyang et al. teaches method for preventing carbon and nitrogen penetration from a deposited overlayer into a dielectric insulating layer to improve a subsequent photolithographic patterning and anisotropic etching process.
U.S. Pat. No. 6,686,272 entitled “Anti-reflective coatings for use at 248 nm and 193 nm” granted Feb. 3, 2004 to Lee, et al. teaches method for forming a silicon carbide anti-reflective coating (ARC) and a silicon oxycarbide ARC, and a silicon oxycarbide ARC treated with oxygen plasma.
U.S. Pat. No. 6,100,559 entitled “Multipurpose Graded Silicon Oxynitride Cap Layer” granted Aug. 8, 2000 to Park teaches a photolithography process using a graded thin SiON layer, as an anti-reflective coating (ARC) and is graded with varying concentrations of nitrogen.
U.S. Pat. No. 6,664,177 entitled “Dielectric ARC scheme to improve photo window in dual damascene process” granted Dec. 16, 2003 to Lin, et al. teaches a multi-layered dual damascene process by using a dielectric anti-reflection coating, DARC, comprised of multiple layers of SiON with varying k, dielectric constant values and thickness, to reduce reflectivity and improve light absorption.